Dr. Marc Pons Solé received his MSc. in Telecommunication Engineering in 2005, DEA in 2007, and PhD. in Electronic Engineering with “European Honors” in 2012, from UPC, Barcelona, Spain. During his PhD. he worked on design for manufacturability and yield of integrated circuits in collaboration with the Intel Barcelona Research Center, Barcelona, Spain, and with CSEM SA, Neuchâtel, Switzerland, where he moved in 2011. From 2012 to 2014 he worked at CSEM as a Post-Doc for Industy in the field of ultra-low-power sub-threshold design. Since 2014 he is R&D Engineer of the SoC and Mixed-Signal Design group at CSEM.